Join World RISC-V Days - Turin Italy on 26 February!

SemiTO-V Student Team is proud to organize the Italian chapter of World RISC-V Days. SemiTO-V invites RISC-V enthusiasts, students, and industry leaders for a half-day of technical talks, networking, and open-hardware innovation.
In the event you will hear from engineers and architects shaping the future of RISC-V across academia and industry.
Event will be held in english.


When: Tuesday, 26 February 2026 - 12:00-18:00

Where: Sala Emma Strada, Politecnico di Torino

Agenda:

• 14:00 - 14:40: OPENING TALKS
• 14:45 - 15:10: RISC-V BASED CORES of CORE-V
  • Speaker: Pasquale Davide Schiavone, OpenHW
• 15:10 - 15:35: RISC-V IN RESEARCH AND INDUSTRY
  • Speaker: Massimiliano Giacometti, Plan-V
• 15:35 - 16:00: THE PPU TECHNOLOGY OF FLOW
  • Speaker: Marcello Ranone, FLOW Computing
• 16:00 - 16:30: BREAK
• 16:30 - 16:55: COMPARATIVE BENCHMARKING ON RISC-V
  • Speaker: Daniele Gregori, E4 Computing
• 16:55 - 17:20: FULLY OPEN SOURCE CHIP DEVELOPMENT
  • Speaker: Daniel Schultz, aesc silicon
• 17:20 - 17:45: ADVANCING DIGITAL HARDWARE IN ITALY
  • Speaker: Davide Rossi, CHIPS-IT
• ​17:45 - 18:00: CLOSING

Registration is limited to 200 attendees due to limitations of Sala Emma Strada. Secure your spot before registration closes to not miss Europe's premier RISC-V gathering!

REGISTER NOW