Nasir Ali Shah

Fellow
Department of Electronics and Telecommunications (DET)

PhD Student in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 35th cycle (2019-2022)
Department of Electronics and Telecommunications (DET)

Profile

PhD

Research topic

FPGA acceleration of algorithms for 5G networks and channel models

Tutors

Research presentation

Video presentation

Research interests

Analog, Power and Mixed-Signal Circuits and Embedded Systems
Big Data, Machine Learning, Neural Networks and Data Science
Electronic devices: modeling and characterization
VLSI theory, design and applications

Biography

Nasir Ali Shah received his bachelor's degree in Computer Systems Engineering from Hamdard University Karachi, Pakistan as a National ICT R&D scholar. He completed his master's degree in Computer Engineering (Embedded Systems) from Politecnico di Torino as an HEC Pakistan scholar. His topic for masters thesis was "Optimization and Acceleration of 5G
Link Layer Simulator" which was carried out in collaboration with TIM research labs. He is currently a doctoral student at the Department of Electronics and Telecommunication, Politecnico di Torino. His area of interest includes FPGA-based hardware acceleration, machine learning, and optimization for high-level synthesis designs.

Publications

Latest publications View all publications in Porto@Iris