Michele Caon

Dottorato in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 36o ciclo (2020-2023)

Dottorato concluso nel 2024

Tesi:

From Control to Compute: Modular CPU design and Programmable Near-Memory Solutions for Edge Applications (Abstract)

Tutori:

Maurizio Martina Guido Masera

Presentazione della ricerca:

Poster

Profilo

Argomento di ricerca

Design of a modular execution pipeline for LEN5, an out-of-order RISC-V processor

Interessi di ricerca

VLSI theory, design and applications

Biografia

Michele Caon received his BSc and MSc (with honours) in Electronics Engineering at Politecnico di Torino in 2017 and 2019 respectively. In his Master's thesis he designed a modular execution pipeline for an out-of-order 64-bit RISC-V processor, using Tomasulo's approach to dynamic scheduling. In 2020, he collaborated as a Research Assistant at Politenico di Torino to the Horizon 2020 project EO-ALERT, mainly focusing on the design and development of the software supporting the compression and encryption of Earth observation images. In late 2020 he joined the VLSI Lab, where he is currently pursuing the PhD in Electrical, Electronics and Communications Engineering under the supervision of Prof. Maurizio Martina. His current research topics focus around the design of innovative programmable computing systems, includign out-of-order architectures for RISC-V microprocessors and energy-efficient near-memory vector porcessing units.

Didattica

Insegnamenti

Corso di laurea magistrale

MostraNascondi A.A. passati

Corso di laurea di 1° livello

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Pubblicazioni

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