Walid Walid

Ph.D. in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 35th cycle (2019-2022)

Ph.D. obtained in 2023

Dissertation:

VLSI ARCHITECTURES FOR VIDEO PROCESSING AND RISC-V (Abstract)

Tutors:

Maurizio Martina Guido Masera

Research presentation:

Poster

Profile

Research topic

VLSI ARCHITECTURES FOR RISC-V IMPLEMENTATION

Research interests

VLSI theory, design and applications

Biography

Walid Walid received his B.Sc. (with distinction) and M.Sc. (summa cum laude) degrees in Electronic Engineering from University of Engineering and Technology Taxila, Pakistan (2015) and Politecnico di Torino, Italy, (2019) respectively. He is currently a Ph.D. student at VLSI lab, Department of Electronics and Telecommunications, Politecnico di Torino, Italy. He has worked on high performance real-time design using ASIC/FPGAs in the domain of object tracking and computer vision. His research interests include AISC Design, FPGA based design, optimization for hardware implementation of ASIC components. He is currently working on VLSI architectures for multi-core processor design.

Teaching

Teachings

Master of Science

MostraNascondi A.A. passati

Bachelor of Science

MostraNascondi A.A. passati

Publications

Works published during the Ph.D. View all publications in Porto@Iris