Junnan Shan

Ph.D. in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 33rd cycle (2017-2020)

Ph.D. obtained in 2021

Dissertation:

Performance and Power Optimization of Multi-kernel Applications on Multi-FPGA Platforms (Abstract)

Tutors:

Mario Roberto Casu Luciano Lavagno

Research presentation:

Video presentation

Profile

Research topic

Performance/energy optimized allocation for multi kernel applications on multi FPGA platforms

Research interests

Big Data, Machine Learning, Neural Networks and Data Science
Electronic devices: modeling and characterization
Modeling, simulation and CAD
VLSI theory, design and applications

Biography

Junnan Shan received B.S. and M.S. degrees in electronic engineering from Politecnico di Torino, Italy, in 2014 and 2016 respectively, where she is currently pursuing a Ph.D. degree with the Department of Electronics and Telecommunications. Her research interests include energy-efficient hardware acceleration, high-level synthesis, system-level design, and design optimization.

Teaching

Teachings

Master of Science

MostraNascondi A.A. passati

Publications

Works published during the Ph.D. View all publications in Porto@Iris