Master of Science

• Synthesis and optimization of digital systems. A.A. 2015/16, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso

Bachelor of Science

• Informatica. A.A. 2013/14, INGEGNERIA AEROSPAZIALE. Collaboratore del corso
• Informatica. A.A. 2014/15, INGEGNERIA AEROSPAZIALE. Collaboratore del corso
• Informatica. A.A. 2015/16, INGEGNERIA AEROSPAZIALE. Collaboratore del corso

• Tenace, Valerio (2016)
  CAD Tools for Graphene-Based Electronic Circuits. relatore: Macii E., 28. XXVIII Ciclo, P.: 116
  Doctoral Thesis
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
  Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS, vol. 63, pp. 1111-1115. ISSN 1549-7747
  Contributo su Rivista
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
  Enabling quasi-adiabatic logic arrays for silicon and beyond-silicon technologies. In: 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal's Sheraton Centre, can, 2016, pp. 2897-2897. ISBN: 9781479953400
  Contributo in Atti di Convegno (Proceeding)
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
  Graphene-PLA (GPLA): A compact and ultra-low power logic array architecture. In: 26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016, usa, 2016, pp. 145-150. ISBN: 9781450342742
  Contributo in Atti di Convegno (Proceeding)
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2016)
  Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits. In: 24th Annual IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallin, Estonia, 26-28 Settembre 2016, pp. 1-6. ISBN: 9781509035618
  Contributo in Atti di Convegno (Proceeding)
• Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
  Ultra-low power circuits using graphene p-n junctions and adiabatic computing. In: MICROPROCESSORS AND MICROSYSTEMS, vol. 39, pp. 962-972. ISSN 0141-9331
  Contributo su Rivista
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2015)
  One-pass logic synthesis for graphene-based Pass-XNOR logic circuits. In: 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015, usa, 2015, pp. 1-6
  Contributo in Atti di Convegno (Proceeding)
• Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo; ... (2015)
  Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. In: Great Lakes Symposium on VLSI, pp. 39-44. ISBN: 9781450334747
  Contributo in Atti di Convegno (Proceeding)
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2014)
  Pass-XNOR Logic: A new Logic Style for P-N Junction based Graphene Circuits. In: DATE-14: ACM/IEEE Design, Automation and Test in Europe
  Contributo in Atti di Convegno (Proceeding)
• Tenace, Valerio; Miryala, Sandeep; Calimera, Andrea; Macii, Alberto; Macii, Enrico; ... (2014)
  Row-Based Body-Bias Assignment for Dynamic Thermal Clock-Skew Compensation. In: MICROELECTRONICS JOURNAL, vol. 45, pp. 530-538. ISSN 0959-8324
  Contributo su Rivista
• Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo (2014)
  Quantifying the figures of merit of graphene-based adiabatic Pass-XNOR Logic (PXL) circuits. In: PRIME-14: IEEE Conference on Ph.D. Research in Microelectronics and Electronics, pp. 1-4
  Contributo in Atti di Convegno (Proceeding)