Nasir Ali Shah

Ph.D. in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 35^th cycle (2019-2022)

Ph.D. obtained in 2023

Dissertation:

Heterogeneous Acceleration for 5G New Radio Channel Modelling Using FPGAs and GPUs (Abstract)

Tutors:

Luciano Lavagno

Research presentation:

Video presentation

Profile

Research topic

FPGA acceleration of algorithms for 5G networks and channel models

Research interests

Analog, Power and Mixed-Signal Circuits and Embedded Systems

Big Data, Machine Learning, Neural Networks and Data Science

Electronic devices: modeling and characterization

VLSI theory, design and applications

Publications

Works published during the Ph.D. View all publications in Porto@Iris

Shah, NASIR ALI (2023)
Heterogeneous Acceleration for 5G New Radio Channel Modelling Using FPGAs and GPUs. relatore: LAVAGNO, Luciano; , 35. XXXV Ciclo, P.: 148
Doctoral Thesis
Shah, NASIR ALI; Lazarescu, Mihai T.; Quasso, Roberto; Lavagno, Luciano (2023)
CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning. In: ELECTRONICS, vol. 15. ISSN 2079-9292
Contributo su Rivista
Shah, NASIR ALI; Lavagno, Luciano; Lazarescu, Mihai T.; Quasso, Roberto; Scarpina, ... (2022)
FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio. In: IEEE ACCESS, vol. 10, pp. 119386-119401. ISSN 2169-3536
Contributo su Rivista