Paolo Bernardi

ERC sectors

SDG

• EDAA Outstanding Dissertation Award conferred by European Design and Automation Association - EDAA, United kingdom (2006)
• Best Paper Award at the IEEE Conference on Design, Automation and Test in Europe conferred by DATE Program Committee, Italy (2006)
• Best Paper award in DDECS 2016 conferred by DDECS organizing committee, Italy (2016)

• Fellow - IEEE, Stati Uniti (2020-)
  IEEE Senior Member

• Microelectronics Reliability (2021-), Guest Editor of magazine or editorial series

• Test Technology Educational Program - TTEP, Program chair
• Test Technology Educational Program - TTEP, Program chair

• Collegio di Ingegneria Informatica, del Cinema e Meccatronica. Componente

Master of Science

• Architetture dei sistemi di elaborazione. A.A. 2024/25, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2023/24, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2022/23, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2021/22, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2020/21, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2019/20, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso

Bachelor of Science

• Computer sciences. A.A. 2025/26, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Computer sciences. A.A. 2024/25, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Computer sciences. A.A. 2023/24, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Computer sciences. A.A. 2022/23, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Informatica. A.A. 2021/22, INGEGNERIA AEROSPAZIALE. Titolare del corso
• Informatica. A.A. 2020/21, INGEGNERIA AEROSPAZIALE. Titolare del corso
• Informatica. A.A. 2019/20, INGEGNERIA AEROSPAZIALE. Titolare del corso

Lecturer of the following courses:

- Architetture dei Sistemi di Elaborazione (1st year Master)

- Computer Science (1st year Bachelor)

• CAD - Electronic CAD & Reliability Group (DAUIN)

Projects funded by competitive calls

• ARBoard - Test di complessi circuiti stampati tramite Realtà Aumentata con estrazione automatica delle caratteristiche topologiche, (2025-2025) - Responsabile Scientifico
  Corporate-funded and donor-funded research

Projects funded by commercial contracts

• TC4xx NVM Test Strategies enabling Minimal Pincount FE Insertion for reduced test costs, (2025-2025) - Componente gruppo di Ricerca
  Commercial Research
• Metodologie per la massimizzazione della stress-coverage mediante applicazione di test strutturali e funzionali in ambiente System Level Test/Burn-In, (2024-2025) - Responsabile Scientifico
  Commercial Research
• Misurazione micrometrica di distanze assolute con metodi basati su triangolazione ottica, (2024-2025) - Responsabile Scientifico
  Commercial Research
• Contratto di ricerca tra il Politecnico di Torino (DISAT) e la Società Dana-TM4 Italia S.r.l. per la realizzazione del Progetto di Ricerca “Analisi dello stato dell’arte di power modules, Studio e Sviluppo di una nuova generazione di power module LV, analisi di affidabilità e test di qualifica” , (2023-2025) - Responsabile Scientifico
  Commercial Research
• Colored NVM bitmap and repair integration with statistical evaluation in production for Aurix3G product family, (2023-2024) - Responsabile Scientifico
  Commercial Research
• Metodologie per la massimizzazione della stress-coverage mediante applicazione di test strutturali e funzionali in ambiente System Level Test/Burn-In e Utilizzo di test funzionali per ridurre l’over-killing dovuto alle condizioni di, (2023-2024) - Responsabile Scientifico
  Commercial Research
• Study of solutions for internal analog signals measurement and delivery of information across the chip in digital form, (2023-2024) - Responsabile Scientifico
  Commercial Research
• Colored NVM bitmap integration and validation in Aurix3G product family and A3G NVM Read Redundancy Analysis PBIST Concurrent Power Aware BIST Test Strategies enabling Minimal Pincount FE Insertion, (2023-2023) - Responsabile Scientifico
  Commercial Research
• Generazione automatica e algoritmica di stimoli per lo stress (burn-in) di dispositivi SoC, (2022-2023) - Responsabile Scientifico
  Commercial Research
• Colored bitmap integration in Aurix2G including demonstration in production environment and porting support to Aurix3G, (2021-2022) - Responsabile Scientifico
  Commercial Research
• Power Drop Aware NVM Concurrent BIST Test Strategies enabling Minimal Pincount FE Insertion (U-RPC), (2019-2020) - Responsabile Scientifico
  Commercial Research
• Redundancy repair algorithm definition for A3G ESF3 based on Array Fail Diagnostic and Suspect Learning, (2019-2020) - Responsabile Scientifico
  Commercial Research
• New techniques for supporting the System-Level Test (SLT) phase fors automotive decives, (2019-2020) - Responsabile Scientifico
  Commercial Research
• Portable Repair DfM Approach for A2G/A3G Flash Test, (2019-2019) - Responsabile Scientifico
  Commercial Research
• Zynq MPSoC Ultrascale +(16nm generation) and Versal (7nm generation), (2019-2020) - Responsabile Scientifico
  Commercial Research
• Zynq MPSoC Ultrascale +(16nm generation), (2018-2019) - Responsabile Scientifico
  Commercial Research
• Portable Repari DfM Approach for A2G/A3G Flash Test, (2018-2019) - Responsabile Scientifico
  Commercial Research
• Everest and Alto projects, (2017-2018) - Responsabile Scientifico
  Commercial Research
• Concept and Implementation Guidelines for Test Time and Diagnosis – Optimal Usage of Hier-archical Design for Testability Hardware regarding typical Production Test Repair corner case Statistics, (2017-2017) - Responsabile Scientifico
  Commercial Research
• LPD (Low Powder Domain) subystem of the MPSoC device, (2017-2017) - Responsabile Scientifico
  Commercial Research
• LPD (Low Powder Domain) subystem of the MPSoC device, (2016-2017) - Responsabile Scientifico
  Commercial Research
• Assesment and Optimization of Hierarchical CPU-based Test for MultiCore eFlash applying DfT Hardware, (2016-2019) - Responsabile Scientifico
  Commercial Research
• SW BIST implementation for Floating Point Unit of 40nm Automotive Microcontrollers, (2016-2016) - Responsabile Scientifico
  Consulting
• Rinnovo della Convenzione Dipartimentale tra il Politecnico di Torino - Dipartimento di Automatica e Informatica (DAUIN), il Centre National de la Recherche Scientifique (CNRS) e l’Université de Montpellier (UM), riguardante il laboratorio franco-italiano per la ricerca in sistemi integrati hardware-software “LIA LAFISI”, (-2020) - Responsabile Scientifico
  Departmental agreements
• Everest and Alto projects, (-2018) - Responsabile Scientifico
  Commercial Research

• Nicola Di Gruttola Giardino. Programme in Ingegneria Aerospaziale (40^th cycle, 2024-in progress)
  Research subject: Enhancing Reliability and Autonomy of Miniaturized Deep-Space Avionic Systems, focusing on Planetary Robotic Platforms
  
  Concurrent Engineering / Aerospace Systems Engineering
  Concurrent Engineering / Aerospace Systems Engineering
• Lorenzo Cardone. Programme in Ingegneria Informatica E Dei Sistemi (38^th cycle, 2022-in progress)
  Research subject: Parallel Techniques for Reliability Measures
  
  Computer architectures and Computer aided design
  Parallel and distributed systems, Quantum computing
  Computer architectures and Computer aided design
  Parallel and distributed systems, Quantum computing
• Gabriele Filipponi. Programme in Ingegneria Informatica E Dei Sistemi (38^th cycle, 2022-in progress)
  Research subject: Manufacturing and In-Field Testing Techniques
  
  Computer architectures and Computer aided design
  Computer architectures and Computer aided design
• Tommaso Foscale. Programme in Ingegneria Informatica E Dei Sistemi (38^th cycle, 2022-in progress)
  Research subject: Testing Techniques for Automotive Systems on Chip
  
  Computer architectures and Computer aided design
  Computer architectures and Computer aided design
• Nima Kolahimahmoudi. Programme in Ingegneria Informatica E Dei Sistemi (38^th cycle, 2023-in progress)
  Research subject: Functional Safety Techniques for Automotive oriented Systems-on-Chip
  
  Computer architectures and Computer aided design
  Computer architectures and Computer aided design
• Francesco Angione. Programme in Ingegneria Informatica E Dei Sistemi (37^th cycle, 2021-2025)
  Thesis: System-Level Test techniques for Automotive SoCs
  
  Computer architectures and Computer aided design
  Controls and system engineering
  Software engineering and Mobile computing
  Computer architectures and Computer aided design
  Controls and system engineering
  Software engineering and Mobile computing
• Giusy Iaria. Programme in Ingegneria Informatica E Dei Sistemi (37^th cycle, 2022-2025)
  Thesis: Towards Ultra-Reliable Automotive Systems-on-Chip
  
  Computer architectures and Computer aided design
• Giorgio Insinga. Programme in Ingegneria Informatica E Dei Sistemi (37^th cycle, 2021-2025)
  Thesis: Test and diagnosis of memories embedded in Automotive SoCs
  
  Computer architectures and Computer aided design
  Computer architectures and Computer aided design

• Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo (2025)
  Enhancing Logic Diagnosis of field returns through Logic BIST in Automotive SoCs. In: 2025 IEEE Latin American Test Symposium, San Andres Islas (COL), 11-14 March 2025. ISBN: 978-1-6654-7763-5
  Contributo in Atti di Convegno (Proceeding)
• Angione, Francesco; Bernardi, Paolo; Bertani, Claudia; Bertetto, Lorenzo; Cardone, ... (2025)
  Leveraging ATE to optimize System-Level-Test for Multicore Automotive SoCs. In: Latin American Test Symposium, San Andres Islas, Colombia, 11-14 March 2025, pp. 1-6. ISBN: 978-1-6654-7763-5
  Contributo in Atti di Convegno (Proceeding)
• Iaria, Giusy; Bernardi, Paolo; Bertani, Claudia; Cardone, Lorenzo; Garozzo, Giuseppe; ... (2025)
  A Comprehensive Scan Test Cost Model to Optimize the Production of very large SoCs. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 74, pp. 1278-1292. ISSN 0018-9340
  Contributo su Rivista
• Angione, Francesco; Bernardi, Paolo; DI GRUTTOLA GIARDINO, Nicola; Filipponi, Gabriele; ... (2025)
  A System-Level Test Methodology for Communication Peripherals in System-on-Chips. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 74, pp. 731-739. ISSN 0018-9340
  Contributo su Rivista
• Bernardi, Paolo; Filipponi, Gabriele; Iaria, Giusy; Bertani, Claudia; Tancorre, Vincenzo (2024)
  Logic Diagnosis Based on Logic Built-In Self-Test Signatures Collected In-Field from Failing System-on-Chips. In: ELECTRONICS, vol. 13. ISSN 2079-9292
  Contributo su Rivista
• Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio (2024)
  A 6-bit Low-Area Hybrid ADC Design For System-on-Chip Measurements. In: IEEE International conference on Design, Test & Technology of Integrated Systems (DTTIS), Aix-en-Provence (FR), 14-16 October 2024. ISBN: 979-8-3503-6312-8
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Cardone, Lorenzo; Foscale, Tommaso (2024)
  Exploring trade-offs in multi-site wafer testing. In: 25th IEEE Latin American Test Symposium 2024, Maceio (BRA), 09-12 April 2024. ISBN: 979-8-3503-6555-9
  Contributo in Atti di Convegno (Proceeding)
• DI GRUTTOLA GIARDINO, Nicola; Angione, Francesco; Bernardi, Paolo; Foscale, Tommaso; ... (2024)
  A Flexible FPGA-based Test Equipment for Enabling Out-of-Production Manufacturing Test Flow of Digital Systems. In: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), Didcot (UK), 08-10 October 2024. ISBN: 979-8-3503-6688-4
  Contributo in Atti di Convegno (Proceeding)
• Schwachhofer, D.; Angione, F.; Becker, S.; Wagner, S.; Sauer, M.; Bernardi, P.; Polian, ... (2024)
  Optimizing System-Level Test Program Generation via Genetic Programming. In: 2024 IEEE European Test Symposium (ETS), The Hague (NL), 20-24 May 2024. ISBN: 979-8-3503-4932-0
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Guerriero, Augusto Maria; Insinga, Giorgio; Paganini, Giovanni; ... (2024)
  Built-In Self-Test Architecture Enabling Diagnosis for Massive Embedded Memory Banks in Large SoCs. In: ELECTRONICS, vol. 13. ISSN 2079-9292
  Contributo su Rivista
• Bernardi, Paolo; Kolahimahmoudi, Nima; Insinga, Giorgio (2023)
  A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test. In: Conference on Very Large Scale Integration (VLSI-SoC 2023), Dubai (United Arab Emirates), October 16 - 18, 2023, pp. 1-6. ISBN: 979-8-3503-2599-7
  Contributo in Atti di Convegno (Proceeding)
• Angione, Francesco; Appello, Davide; Bernardi, Paolo; Calabrese, Andrea; Quer, Stefano; ... (2023)
  A Toolchain to Quantify Burn-In Stress Effectiveness on large Automotive System-on-Chips. In: IEEE ACCESS, vol. 11, pp. 105655-105676. ISSN 2169-3536
  Contributo su Rivista
• Angione, Francesco; Bernardi, Paolo; Cantoro, Riccardo; Di Gruttola Giardino, Nicola; ... (2023)
  On the integration and hardening of Software Test Libraries in Real-Time Operating Systems. In: Latin American Test Symposium, Veracruz (Mexico), 21-24 March 2023, pp. 1-6. ISBN: 979-8-3503-2597-3
  Contributo in Atti di Convegno (Proceeding)
• Angione, Francesco; Bernardi, Paolo; Di Gruttola Giardino, Nicola; Appello, Davide; ... (2023)
  A guided debugger-based fault injection methodology for assessing functional test programs. In: VLSI Test Symposium, San Diego (USA), 24-26 April 2023, pp. 1-7. ISBN: 979-8-3503-4630-5
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Filipponi, Gabriele; Reorda, Matteo Sonza; Appello, Davide; Bertani, ... (2023)
  Collecting diagnostic information through dichotomic search from Logic BIST of failing in-field automotive SoCs with delay faults. In: International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Tallinn (Estonia), 03-05 May 2023, pp. 21-26. ISBN: 979-8-3503-3277-3
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Cardone, Lorenzo; Iaria, Giusy; Appello, Davide; Garozzo, Giuseppe; ... (2023)
  About the correlation between logical identified faulty gates and their layout characteristics. In: IEEE International Symposium on On-Line Testing and Robust System Design, 03-05 July 2023, Crete, Greece. ISBN: 979-8-3503-4135-5
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Filipponi, Gabriele; Foscale, Tommaso; Insinga, Giorgio (2023)
  Low cost external serial interface watchdog for SoCs and FPGAs automatic characterization tests. In: IEEE Latin-American Test Symposium, Veracruz (Mexico), 21-24 March 2023. ISBN: 979-8-3503-2597-3
  Contributo in Atti di Convegno (Proceeding)
• Angione, F.; Appello, D.; Bernardi, P.; Bertani, C.; Gallo, G.; Littardi, S.; Pollaccia, ... (2023)
  A Low-Cost Burn-In Tester Architecture to supply Effective Electrical Stress. In: IEEE TRANSACTIONS ON COMPUTERS, pp. 1447-1459. ISSN 0018-9340
  Contributo su Rivista
• Angione, Francesco; Bernardi, Paolo; Calabrese, Andrea; Cardone, Lorenzo; Niccoletti, ... (2022)
  An innovative Strategy to Quickly Grade Functional Test Programs. In: International Test Conference, Anaheim, CA (USA), 23-30 September 2022, pp. 355-364
  Contributo in Atti di Convegno (Proceeding)
• Angione, Francesco; Bernardi, Paolo; Filipponi, Gabriele; Tempesta, Claudia; SONZA ... (2022)
  Online scheduling of concurrent Memory BISTs execution at Real-Time Operating-System level. In: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Austin (USA), 19-21 October 2022
  Contributo in Atti di Convegno (Proceeding)
• Iaria, Giusy; Angione, Francesco; Bernardi, Paolo; SONZA REORDA, Matteo; Davide, ... (2022)
  A novel Pattern Selection Algorithm to reduce the Test Cost of large Automotive Systems-on-Chip. In: Latin American Test Symposium, Montevideo (Uruguay), 05-08 September 2022
  Contributo in Atti di Convegno (Proceeding)
• Appello, D.; Bernardi, Paolo; Calabrese, Andrea; Pollaccia, G.; Quer, Stefano; Tancorre, ... (2022)
  Parallel Multithread Analysis of Extremely Large Simulation Traces. In: IEEE ACCESS, vol. 10, pp. 56440-56457. ISSN 2169-3536
  Contributo su Rivista
• Iaria, G.; Foscale, T.; Bernardi, P.; Presicce, L.; Sonza Reorda, M.; Appello, D.; ... (2022)
  A novel SEU injection setup for Automotive SoC. In: 2022 IEEE International Symposium on Industrial Electronics, Anchorage, AK (USA), 01-03 June 2022, pp. 623-626. ISBN: 978-1-6654-8240-0
  Contributo in Atti di Convegno (Proceeding)
• Angione, Francesco; Bernardi, Paolo; Filipponi, Gabriele; SONZA REORDA, Matteo; Appello, ... (2022)
  An Optimized Burn-In Stress Flow targeting Interconnections logic to Embedded Memories in Automotive Systems-on-Chip. In: IEEE European Test Symposium, Barcelona (Spain), 23-27 May 2022, pp. 1-6. ISBN: 978-1-6654-6706-3
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, Paolo; Insinga, Giorgio; Paganini, Giovanni; Cantoro, Riccardo; Beer, Peter; ... (2022)
  Optimized diagnostic strategy for embedded memories of Automotive Systems-on-Chip. In: IEEE European Test Symposium, Barcelona (Spain), 23-27 May 2022, pp. 1-6. ISBN: 978-1-6654-6706-3
  Contributo in Atti di Convegno (Proceeding)
• Angione, F.; Appello, D.; Aribido, J.; Bellarmino, N.; Bernardi, P.; Cantoro, R.; de ... (2022)
  Test, Reliability and Functional Safety trends for Automotive System-on-Chip. In: IEEE European Test Symposium
  Contributo in Atti di Convegno (Proceeding)
• Bernardi, P.; Cantoro, R.; Coyette, A.; Dobbeleare, W.; Fieback, M.; Floridia, A.; ... (2022)
  Recent Trends and Perspectives on Defect-Oriented Testing. In: The 28th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Torino (Italy), 12-14 September 2022
  Contributo in Atti di Convegno (Proceeding)
• Angione, F.; Appello, D.; Aribido, J.; Athavale, J.; Bellarmino, N.; Bernardi, P.; ... (2022)
  Test, Reliability and Functional Safety Trends for Automotive System-on-Chip. In: 2022 IEEE European Test Symposium (ETS), Barcelona (Spain), 23-27 May 2022, pp. 1-10. ISBN: 978-1-6654-6706-3
  Contributo in Atti di Convegno (Proceeding)
• Huard, V.; Jacquet, F.; Mhira, S.; Jure, L.; Montfort, O.; Louvat, M.; Zaia, L.; ... (2022)
  Runtime Test Solution for Adaptive Aging Compensation and Fail Operational Safety mode. In: 2022 IEEE International Reliability Physics Symposium (IRPS), Dallas, TX (USA), 27-31 March 2022. ISBN: 978-1-6654-7950-9
  Contributo in Atti di Convegno (Proceeding)
• Appello, D.; Chen, H. H.; Sauer, M.; Polian, I.; Bernardi, P.; Reorda, M. S. (2021)
  System-Level Test: State of the Art and Challenges. In: 27th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2021, 2021, pp. 1-7. ISBN: 978-1-6654-3370-9
  Contributo in Atti di Convegno (Proceeding)