A Post-Quantum Secure RISC-V application core for IoT

• At the 8th International Conference on PhD Research in Microelectronics and Electronic, based on the reviewers' and the awards committee's evaluation top 30% of papers has been awarded. The SILVER LEAF Certificate is for papers between top 10% and top 20%. (2023)
• RISC-V Summit Europe Hackathon Participant As part of RISC-V Summit Europe, I participated in an in-person hackathon hosted by RISC-V International in collaboration with Codasip and Renesas. This hands-on learning experience was designed for students and early-to-mid stage enthusiasts. The hackathon involved choosing from onsite problems, utilizing available resources to develop unique solutions within 3-4 hours, and presenting the solutions in the Expo Hall. (2024)
• RISC-V Foundational Associate (RVFA) (2025)
• Certificate for CrypTO Conference 2025. (2025)
• Certificate course RISC-V Fundamentals (LFD210) by LINUX. (2024)

• Collegio di Ingegneria Elettronica, delle Telecomunicazioni e Fisica. Componente invitato
• Collegio di Ingegneria Informatica, del Cinema e Meccatronica. Componente invitato

Master of Science

• Hardware & Wireless Security (modulo di Hardware and embedded security). A.A. 2024/25, CYBERSECURITY. Collaboratore del corso
• Integrated systems architecture. A.A. 2023/24, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso

• Dolmeta, Alessandra; Piscopo, Valeria; Mirigaldi, Mattia; Martina, Maurizio; Masera, ... (2025)
  RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards. In: 2025 IEEE International Symposium on Circuits and Systems, Londra (UK), May 25-28, 2025, pp. 1-5. ISBN: 979-8-3503-5683-0
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra (2025)
  A Post-Quantum Secure RISC-V application core for IoT: from hardware design to applications. relatore: MASERA, Guido; MARTINA, MAURIZIO; , 38. XXXVIII Ciclo, P.: 249
  Doctoral Thesis
• Farnaghinejad, Behnam; Bellizia, Davide; Dolmeta, Alessandra; Masera, Guido; Porsia, ... (2025)
  Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF). In: International Test Conference 2025, San Diego, California (USA), September 20-26, 2025, pp. 233-242. ISBN: 979-8-3315-7041-5
  Contributo in Atti di Convegno (Proceeding)
• Piscopo, Valeria; Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, ... (2025)
  A High-Entropy True Random Number Generator with Keccak Conditioning for FPGA. In: SENSORS, vol. 25. ISSN 1424-8220
  Contributo su Rivista
• Dolmeta, Alessandra; Di Matteo, Stefano; Valea, Emanuele; Carmona, Mikael; Loiseau, ... (2025)
  TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography. In: 2025 Design, Automation & Test in Europe Conference (DATE), Lyon (Fra), 31 March - 2 April 2025, pp. 1-7. ISBN: 978-3-9826741-0-0
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido (2025)
  Exploring the New CV-X-IF Interface to Customize RISC-V Instruction Sets: A Case of Study in Cryptography. In: Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2024, Torino (Ita), 19-20 September 2024, pp. 39-47. ISSN 1876-1100. ISBN: 9783031840999
  Contributo in Atti di Convegno (Proceeding)
• Piscopo, Valeria; Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, ... (2025)
  A Deep Dive into Integration Methodologies in RISC-V. In: 22nd ACM International Conference on Computing Frontiers, Cagliari (Ita), May 28-30, 2025, pp. 30-33. ISBN: 979-8-4007-1393-4
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido (2025)
  CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON. In: IEEE Computer Society Annual Symposium on VLSI, Kalamata (Gre), July 6-9, 2025, pp. 1-6. ISBN: 979-8-3315-3477-6
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido (2024)
  ATHOS: A Hybrid Accelerator for PQC CRYSTALS-Algorithms exploiting new CV-X-IF Interface. In: IEEE ACCESS, vol. 12, pp. 182340-182352. ISSN 2169-3536
  Contributo su Rivista
• Dolmeta, Alessandra; Valpreda, Emanuele; Martina, Maurizio; Masera, Guido (2024)
  Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber. In: Proceedings of the 21st ACM International Conference on Computing Frontiers Workshops and Special Sessions, Ischia (Italy), May 7-9, 2024, pp. 59-62. ISBN: 9798400704925
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido (2024)
  LOKI Low-Latency Open-Source Kyber-Accelerator IPs. In: ApplePies 2023 : International Conference on Applications in Electronics Pervading Industry, Environment and Society, Genova, Italy, September 28-29, 2023, pp. 29-35. ISSN 1876-1100. ISBN: 978-3-031-48120-8
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido (2023)
  Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber. In: Proceedings of the 20th ACM International Conference on Computing Frontiers, Bologna, Italy, 9-11 maggio 2023, pp. 381-382. ISBN: 9798400701405
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido (2023)
  Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives. In: 2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), Valencia, Spain, 18-21 June 2023, pp. 209-212. ISBN: 979-8-3503-0320-9
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido (2023)
  Comparative Study of Keccak SHA-3 Implementations. In: CRYPTOGRAPHY, vol. 7, pp. 1-16. ISSN 2410-387X
  Contributo su Rivista