• Collegio di Ingegneria Informatica, del Cinema e Meccatronica. Componente invitato

Master of Science

• Synthesis and optimization of digital systems. A.A. 2016/17, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso
• Synthesis and optimization of digital systems. A.A. 2017/18, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso

Projects funded by commercial contracts

• Corso di formazione su addestramento di algoritmi di Machine Learning, (periodo sconosciuto) - Responsabile Scientifico
  Commercial contracts

• Grimaldi, Matteo; Peluso, Valentino; Calimera, Andrea (2020)
  EAST: Encoding-Aware Sparse Training for Deep Memory Compression of ConvNets. In: IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), pp. 233-237. ISBN: 978-1-7281-4922-6
  Contributo in Atti di Convegno (Proceeding)
• Peluso, V.; Rizzo, R. G.; Calimera, A. (2020)
  Efficacy of topology scaling for temperature and latency constrained embedded convnets. In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS, vol. 10. ISSN 2079-9268
  Contributo su Rivista
• Peluso, Valentino (2020)
  Optimization Tools for ConvNets on the Edge. relatore: MACII, Enrico; , 32. XXXII Ciclo, P.: 158
  Doctoral Thesis
• Peluso, V.; Cipolletta, A.; Calimera, A.; Poggi, M.; Tosi, F.; Aleotti, F.; Mattoccia, S. (2020)
  Enabling monocular depth perception at the very edge. In: 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, CVPRW 2020, usa, 2020, pp. 1581-1583. ISBN: 978-1-7281-9360-1
  Contributo in Atti di Convegno (Proceeding)
• Peluso, V.; Cipolletta, A.; Vaiana, F.; Calimera, A. (2019)
  Integer ConvNets on embedded CPUs: Tools and performance assessment on the cortex-A cores. In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, ita, 2019, pp. 598-601. ISBN: 978-1-7281-0996-1
  Contributo in Atti di Convegno (Proceeding)
• Grimaldi, Matteo; Peluso, Valentino; Calimera, Andrea (2019)
  Optimality Assessment of Memory-Bounded ConvNets Deployed on Resource-Constrained RISC Cores. In: IEEE ACCESS, pp. 1-13. ISSN 2169-3536
  Contributo su Rivista
• Peluso, Valentino; Rizzo, Roberto Giorgio; Calimera, Andrea (2019)
  Performance Profiling of Embedded ConvNets under Thermal-Aware DVFS. In: ELECTRONICS, vol. 8. ISSN 2079-9292
  Contributo su Rivista
• Peluso, V.; Grimaldi, M.; Calimera, A. (2019)
  Arbitrary-Precision Convolutional Neural Networks on Low-Power IoT Processors. In: 27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, per, 2019, pp. 142-147. ISBN: 978-1-7281-3915-9
  Contributo in Atti di Convegno (Proceeding)
• Peluso, V.; Rizzo, R. G.; Cipolletta, A.; Calimera, A. (2019)
  Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets. In: 6th International Conference on Social Networks Analysis, Management and Security, SNAMS 2019, esp, 2019, pp. 454-459. ISBN: 978-1-7281-2946-4
  Contributo in Atti di Convegno (Proceeding)
• Jahier Pagliari, Daniele; Peluso, Valentino; Chen, Yukai; Calimera, Andrea; Macii, ... (2018)
  All-digital embedded meters for on-line power estimation. In: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 19-23 March 2018, pp. 737-742. ISBN: 978-3-9819263-0-9
  Contributo in Atti di Convegno (Proceeding)
• Peluso, Valentino; Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Macii, Enrico; Alioto, ... (2017)
  Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping. In: VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability / S.N., S.L., Springer, pp. 152-172. ISBN: 978-3-319-67103-1
  Contributo in Volume

• Stima di profondità a ridotto consumo di potenza, e altri segnali da singola immagine. national and international Patent
  Inventors: Andrea Calimera Antonio Cipolletta Valentino Peluso