Corso di laurea di 1° livello

• Informatica. A.A. 2016/17, INGEGNERIA AEROSPAZIALE. Collaboratore del corso
• Informatica. A.A. 2018/19, INGEGNERIA AEROSPAZIALE. Collaboratore del corso

• Avramenko, Serhiy; Violante, Massimo (2019)
  RTOS Solution for NoC-Based COTS MPSoC Usage in Mixed-Criticality Systems. In: JOURNAL OF ELECTRONIC TESTING, vol. 35, pp. 29-44. ISSN 0923-8174
  Contributo su Rivista
• Avramenko, Serhiy (2019)
  Network-on-Chip -based Multi-Processor System-on-Chip: Towards Mixed-Criticality System Certification. relatore: VIOLANTE, MASSIMO; , 31. XXXI Ciclo, P.: 161
  Doctoral Thesis
• Avramenko, Serhiy; Payandeh Azad, Siavoosh; Violante, Massimo; Raik, Jaan; Niazmand, ... (2018)
  Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. In: International Conference on Very Large Scale Integration (VLSI-SoC), Verona (ITA), 8-10 October 2018, pp. 207-212. ISBN: 978-1-5386-4756-1
  Contributo in Atti di Convegno (Proceeding)
• Esposito, Stefano; Avramenko, Serhiy; Violante, Massimo (2018)
  Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. In: International Symposium on On-Line Testing and Robust System Design, Platja d'Aro (Spain), 2-4 July 2018. ISBN: 978-1-5386-5992-2
  Contributo in Atti di Convegno (Proceeding)
• Avramenko, Serhiy; Azad, Siavoosh Payandeh; Esposito, Stefano; Niazmand, Behrad; ... (2018)
  QoSinNoC: Analysis of QoS-aware NoC architectures for mixed-criticality applications. In: 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2018, hun, 2018, pp. 67-72. ISBN: 9781538657546
  Contributo in Atti di Convegno (Proceeding)
• Avramenko, Serhiy; Esposito, Stefano; Violante, Massimo (2018)
  Rice Coding-Based Lite Compression Algorithm with Controlled Error for Sensor Data. In: IEEE International Workshop on Metrology for AeroSpace (MetroAeroSpace), pp. 6-10. ISBN: 978-1-5386-2474-6
  Contributo in Atti di Convegno (Proceeding)
• Esposito, Stefano; Avramenko, Serhiy; Violante, Massimo (2018)
  RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC. In: Test Symposium (LATS), 2018 IEEE 19th Latin-American, Sao Paulo, Brasile, pp. 1-6. ISBN: 978-1-5386-1472-3
  Contributo in Atti di Convegno (Proceeding)
• Flenker, Tino; Malburg, Jan; Fey, Goerschwin; Avramenko, Serhiy; Violante, Massimo; ... (2017)
  Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. In: 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, deu, 2017, pp. 533-538. ISBN: 9781509067626
  Contributo in Atti di Convegno (Proceeding)
• Avramenko, Serhiy; SONZA REORDA, Matteo; Violante, Massimo; Fey, Görschwin (2017)
  A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. In: JOURNAL OF ELECTRONIC TESTING, pp. 1-12. ISSN 0923-8174
  Contributo su Rivista
• Avramenko, Serhiy; SONZA REORDA, Matteo; Violante, Massimo; Fey, Görschwin; Mess, Jan ... (2016)
  On the robustness of DCT-based compression algorithms for space applications. In: IEEE International Symposium on On-Line Testing and Robust System Design, Sant Feliu de Guixols, 4 – 6 July 2016, pp. 1-2. ISBN: 978-1-5090-1507-8
  Contributo in Atti di Convegno (Proceeding)
• Avramenko, Serhiy; SONZA REORDA, Matteo; Violante, Massimo; Fey, G. (2016)
  Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. In: 17th IEEE Latin-American Test Symposium, LATS 2016, bra, 2016, pp. 14-19. ISBN: 9781509013319
  Contributo in Atti di Convegno (Proceeding)
• Esposito, Stefano; Avramenko, Serhiy; Violante, Massimo (2016)
  On the consolidation of mixed criticalities applications on multicore architectures. In: 2016 17th Latin-American Test Symposium (LATS), Foz-do-Iguacu (Brasile), 6-8 Aprile 2016, pp. 57-62
  Contributo in Atti di Convegno (Proceeding)
• Avramenko, Serhiy; Esposito, Stefano; Violante, Massimo; Sozzi, Marco; Traversone, ... (2015)
  An Hybrid Architecture for consolidating mixed criticality applications on multicore systems. In: IEEE International On-Line Testing Symposium, pp. 26-29. ISBN: 978-1-4673-7905-2
  Contributo in Atti di Convegno (Proceeding)