Dottorato in Ingegneria Informatica E Dei Sistemi , 21o ciclo (2006-2008)
Dottorato concluso nel 2009
Tesi:
Algorithms and Design Methodology for Leakage Power Optimization Using Multi-Threshold CMOS Technology.
Tutori:
Enrico MaciiPubblicazioni
Pubblicazioni più recenti Vedi tutte le pubblicazioni su Porto@Iris
- VISWESWARA SATHANUR, Ashoka; Luca, Benini; Macii, Alberto; Macii, Enrico; Poncino, ... (2008)
Multiple power-gating domain (multi-VGND)architecture for improved leakage power reduction. In: ISLPED-08:International Symposium on Low Power Electronics and Design, Bangalore, India, pp. 51-56. ISBN: 9781605581095
Contributo in Atti di Convegno (Proceeding) - Calimera, Andrea; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; ... (2008)
Thermal-Aware Design Techniques for Nanometer CMOS Circuits. In: JOURNAL OF LOW POWER ELECTRONICS, vol. 3, pp. 374-384. ISSN 1546-1998
Contributo su Rivista - VISWESWARA SATHANUR, Ashoka; Calimera, Andrea; A., Pullini; L., Benini; Macii, Alberto; ... (2008)
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. In: ISCAS 2008, Seattle, WA, 18-21 May 2008. ISBN: 9781424416837
Contributo in Atti di Convegno (Proceeding) - Chakraborty, A.; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P.; ... (2008)
Dynamic thermal clock skew compensation using tunable delay buffers. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 16, pp. 639-649. ISSN 1063-8210
Contributo su Rivista - VISWESWARA SATHANUR, Ashoka; Pullini, A; Benini, L; Macii, Alberto; Macii, Enrico; ... (2008)
Optimal sleep transistor synthesis under timing and area constraints. In: GLSVLSI '08: 18th ACM Great Lakes symposium on VLSI, Orlando, Florida, May 04-06, 2008, pp. 177-182. ISBN: 9781595939999
Contributo in Atti di Convegno (Proceeding) - VISWESWARA SATHANUR, Ashoka; Pullini, A; Benini, L; Macii, Alberto; Macii, Enrico; ... (2008)
A Scalable Algorithmic Framework for Row-Based Power-Gating. In: DATE '08. Design, Automation and Test in Europe, Munich (DEU), 10-14 March 2008, pp. 379-384. ISBN: 9783981080131
Contributo in Atti di Convegno (Proceeding) - Macii, Alberto; Chakraborty, A; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; ... (2008)
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. In: INTEGRATION, vol. 41, pp. 2-8. ISSN 0167-9260
Contributo su Rivista - VISWESWARA SATHANUR, Ashoka; Pullini, A; Benini, L; Macii, Alberto; Macii, Enrico; ... (2007)
Timing-driven row-based power gating. In: ISLPED-07: ACM/IEEE International Symposium on Low PowerElectronics and Design, Portland, Oregon, Agosto 2007, pp. 104-109. ISBN: 9781595937094
Contributo in Atti di Convegno (Proceeding) - VISWESWARA SATHANUR, Ashoka; Calimera, Andrea; Benini, L; Macii, Alberto; Macii, Enrico; ... (2007)
Efficient Computation of Discharge Current Upper Bounds for Clustered Sleep Transistor Sizing. In: DATE-07: IEEE Design Automation and Test in Europe, Nizza, Francia, 16-20 April 2007, pp. 1-6. ISBN: 9783981080124
Contributo in Atti di Convegno (Proceeding) - Calimera, Andrea; Macii, Alberto; Pullini, A.; VISWESWARA SATHANUR, Ashoka; Benini, L.; ... (2007)
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. In: GLSVLSI-07: ACM/IEEE 17th Great Lakes Symposium on VLSI, Stresa, Marzo, pp. 501-504
Contributo in Atti di Convegno (Proceeding) - Chakraborty, A; Duraisami, Karthik; Sithambaram, P; VISWESWARA SATHANUR, Ashoka; Macii, ... (2006)
Dynamic Thermal Clock Skew Compensation using Tunable Delay Buffers. In: ISLPED-06: ACM/IEEE International Symposium on Low Power Electronics and Design, Tegernsee, Germany, pp. 162-167. ISBN: 1595934626
Contributo in Atti di Convegno (Proceeding) - Chakraborty, A; Duraisami, Karthik; VISWESWARA SATHANUR, Ashoka; Sithambaram, P; Macii, ... (2006)
Implications of Ultra Low-Voltage Devices on Design Techniques for Controlling Leakage in NanoCMOS Circuits. In: ISCAS-06: IEEE International Conference on Circuits and Systems, Kos Island, Greece, pp. 33-36. ISBN: 0780393899
Contributo in Atti di Convegno (Proceeding)