Anagrafe della ricerca

Digital technologies such as embedded AI, IoT and edge/cloud computing are at the heart of the transition to a greener economy, both at the European and Italian level. For this transition to happen, compute platforms capable of delivering high performance within tight power envelopes are fundamental. FPGA-based systems-on-chip are among the most promising solutions, but their adoption is hindered by integration, programming, and management complexity of many heterogeneous components. The computational complexity, sustained data flow and tight system requirements of algorithm acceleration via FPGAs exacerbate these problems, forcing lengthy design iterations to select and configure HW and SW components. Starting from the technical challenges in Unmanned Aerial Vehicles and Radio Access Networks, PEACE will define an integrated design methodology and framework to efficiently deploy accelerators on multiple FPGA-based SoCs while meeting performance, predictability and energy constraints.