Lorenzo Cardone

Ph.D. candidate in Ingegneria Informatica E Dei Sistemi , 38^th cycle (2022-2025)
Department of Control and Computer Engineering (DAUIN)

Docente esterno e/o collaboratore didattico
Department of Control and Computer Engineering (DAUIN)

lorenzo.cardone@polito.it

Profile

PhD

Research topic

Parallel Techniques for Reliability Measures

Tutors

Research interests

Computer architectures and Computer aided design

Parallel and distributed systems, Quantum computing

Biography

Lorenzo Cardone is a PhD student at the Politecnico di Torino, where he earned a Bachelor's degree in Computer Science in 2019, followed by a Master's degree in Computer Graphics and Multimedia in 2021. His primary research interests include software parallelization and optimization, with a particular emphasis on tackling complex graph problems relevant to optimization applications. His doctoral research is centered on applying these concepts to the field of Electronic Design Automation (EDA), specifically in circuit and fault simulation.

Teaching

Teachings

Bachelor of Science

Operating systems. A.A. 2024/25, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso
Sistemi operativi. A.A. 2024/25, INGEGNERIA INFORMATICA. Collaboratore del corso
Operating systems. A.A. 2023/24, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Collaboratore del corso
Sistemi operativi. A.A. 2023/24, INGEGNERIA INFORMATICA. Collaboratore del corso

MostraNascondi A.A. passati

Research

Research groups

FM - Formal Methods Group (DAUIN)

Publications

Latest publications View all publications in Porto@Iris

Angione, Francesco; Bernardi, Paolo; Bertani, Claudia; Bertetto, Lorenzo; Cardone, ... (2025)
Leveraging ATE to optimize System-Level-Test for Multicore Automotive SoCs. In: Latin American Test Symposium, San Andres Islas, Colombia, 11-14 March 2025, pp. 1-6. ISBN: 978-1-6654-7763-5
Contributo in Atti di Convegno (Proceeding)
Iaria, Giusy; Bernardi, Paolo; Bertani, Claudia; Cardone, Lorenzo; Garozzo, Giuseppe; ... (2025)
A Comprehensive Scan Test Cost Model to Optimize the Production of very large SoCs. In: IEEE TRANSACTIONS ON COMPUTERS, vol. 74, pp. 1278-1292. ISSN 0018-9340
Contributo su Rivista
Cardone, Lorenzo (2024)
Exploiting the Connectivity metric in test programs generation. In: IEEE 29th European Test Symposium 2024, The Hague (NLD), 20/05/2024 - 24/05/2024
Contributo in Atti di Convegno (Proceeding)
Bernardi, Paolo; Cardone, Lorenzo; Foscale, Tommaso (2024)
Exploring trade-offs in multi-site wafer testing. In: 25th IEEE Latin American Test Symposium 2024, Maceio (BRA), 09-12 April 2024. ISBN: 979-8-3503-6555-9
Contributo in Atti di Convegno (Proceeding)
Cardone, Lorenzo; Di Martino, Salvatore; Quer, Stefano (2024)
Efficiently Computing Maximum Clique of Sparse Graphs with Many-Core Graphical Processing Units. In: ICSOFT 2024: 19th International Conference on Software Technologies, Dijon (FRA), 8-10 July, 2024, pp. 539-546. ISBN: 978-989-758-706-1
Contributo in Atti di Convegno (Proceeding)