PhD Student in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 37th cycle (2021-2024)
Department of Electronics and Telecommunications (DET)
Profile
PhD
Research topic
Improving Quality of Results for HLS designs
Tutors
Research interests
Biography
His research interests focus on high-level synthesis, digital hardware design, and HW/SW co-design.
Publications
Latest publications View all publications in Porto@Iris
- Brignone, Giovanni; Lazarescu, Mihai T.; Lavagno, Luciano (In stampa)
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs. In: IEEE International Conference on Computer Design, Washington (USA), 6/11/2023 - 8/11/2023
Contributo in Atti di Convegno (Proceeding) - Ottati, Fabrizio; Gao, Chang; Chen, Qinyu; Brignone, Giovanni; Casu, Mario Roberto; ... (2023)
To Spike or Not To Spike: A Digital Hardware Perspective on Deep Learning Acceleration. In: IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS. ISSN 2156-3365
Contributo su Rivista - Brignone, Giovanni; Jamal, Muhammad Usman; Lazarescu, Mihai T.; Lavagno, Luciano (2022)
Array-specific dataflow caches for high-level synthesis of memory-intensive algorithms on FPGAs. In: IEEE ACCESS, vol. 10, pp. 118858-118877. ISSN 2169-3536
Contributo su Rivista