Research Contractor
Department of Electronics and Telecommunications (DET)
Profile
Scientific branch
(Area 0009 - Industrial and information engineering)
Teaching
Collegi of the degree programmes
- Collegio di Ingegneria Elettrica ed Energetica. Componente invitato
- Collegio di Ingegneria Elettronica, delle Telecomunicazioni e Fisica. Componente invitato
- Collegio di Ingegneria Informatica, del Cinema e Meccatronica. Componente invitato
Teachings
Master of Science
- Hardware & Wireless Security (modulo di Hardware and embedded security). A.A. 2026/27, CYBERSECURITY ENGINEERING. Collaboratore del corso
- Electronic systems engineering. A.A. 2026/27, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
- Integrated systems architecture. A.A. 2026/27, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
- Hardware & Wireless Security (modulo di Hardware and embedded security). A.A. 2025/26, CYBERSECURITY ENGINEERING. Collaboratore del corso
- Integrated systems architecture. A.A. 2025/26, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
- Hardware & Wireless Security (modulo di Hardware and embedded security). A.A. 2024/25, CYBERSECURITY. Collaboratore del corso
- Integrated systems architecture. A.A. 2023/24, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
Bachelor of Science
- Fondamenti di elettronica di potenza. A.A. 2026/27, INGEGNERIA ELETTRICA. Collaboratore del corso
- Digital systems electronics. A.A. 2025/26, INGEGNERIA ELETTRONICA. Collaboratore del corso
Research
Research Areas/Fields/Groups
Publications
Latest publications View all publications in Porto@Iris
- Giuffrida, Luigi; Dolmeta, Alessandra; Naclerio, Alessio; Piscopo, Valeria; Mirigaldi, ... (2026)
PolHEEPo: A 65 nm 6mm2 RISC-V SoC Filling the Gap Between Cloud and Edge Computing. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS, pp. 1-1. ISSN 1549-7747
Contributo su Rivista - Cutrera, Giuseppe; Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, ... (2026)
A Lightweight Accelerator for the LESS Digital Signature Scheme. In: CRYPTOGRAPHY, vol. 10. ISSN 2410-387X
Contributo su Rivista - Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido (2026)
CIRCE CROSS Integrated RISC-V Cryptographic Extension. In: 2026 Design, Automation & Test in Europe Conference (DATE), Verona (Ita), 20 - 23 April 2026, pp. 1-3. ISBN: 978-3-9826741-1-7
Contributo in Atti di Convegno (Proceeding) - Dolmeta, Alessandra (2025)
A Post-Quantum Secure RISC-V application core for IoT: from hardware design to applications. relatore: MASERA, Guido; MARTINA, MAURIZIO; , 38. XXXVIII Ciclo, P.: 249
Doctoral Thesis - Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido (2025)
CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON. In: IEEE Computer Society Annual Symposium on VLSI, Kalamata (Gre), July 6-9, 2025, pp. 1-6. ISBN: 979-8-3315-3477-6
Contributo in Atti di Convegno (Proceeding)