SENSEI - Sensemaking for Scalable IoT Platforms with In-Situ Data-Analytics: A Software-to-Silicon Solution for Energy-Efficient Machine-Learning on Chip
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The potential of the Internet-of-Things (IoT) is not the amount of data collected, it's the ability to make sense of the information inferred from data. Known as "sensemaking", the process currently involves off-line data analytics based on machine learning (ML) algorithms. With the exponential growth of mobile devices connected to the IoT, the challenge is how to make IoT sustainable, i.e., how to absorb the continuous streams of data preventing resource congestion. That's the focus for the BigData community, active in pursuing solutions for data-centers (where data are stored) and networks (where data flow). The SENSEI project lines up with the same urgent issue, yet following a different strategy: act at the source of the problem, i.e., the sensor nodes, where data originate. The vision is that smart sensors with embedded data analytics can generate data with high information density rather than just high volume. Moving from off-line to on-line data analytics, i.e., in-situ, reduces traffic on the net and improve IoT scalability. Within this context, the focus turns over smart sensors that can run intensive ML tasks with the tiny energy budget of portable applications. The objective of the SENSEI project is twofold. First, devise new energy-efficient computer architectures that leverage dedicated hardware accelerators for ML. Second, provide computer-aided design framework for area/energy optimization. The main outcome is a Software-to-Silicon solution for data analytics System-on-Chips (SoCs). SENSEI works through Deep Learning and Convolutional Neural Networks (CNNs), a new computing paradigm proven to be as accurate as humans in statistical inference. The final goal is to devise a IoT sensor node for in-situ visual reasoning with an energy efficiency below 10pJ/operation; this will ensure a full day of operation with a standard smartphone battery. Measurements on a test-chip fabricated with an industrial CMOS technology will quantify the achieved results.
- Andrea Calimera. (Responsabile Scientifico)
- FONDAZIONE COMPAGNIA DI SAN PAOLO
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