Edgar Ernesto Sanchez Sanchez

ERC sectors

SDG

• Best Paper Award at the IEEE Conference on Design, Automation and Test in Europe conferred by DATE Program Committee, Italy (2006)
• Best Paper award in DDECS 2013 conferred by DDECS organizing committee, Repubblica Ceca (2013)

• 26th IEEE European Test Symposium (24/5/2021-28/5/2021), Program committee
• 25th IEEE European Test Symposium (25/5/2020-1/6/2020), Program committee
• 24th IEEE European Test Symposium (27/5/2019-31/12/2021), Program committee
• 18th IEEE Latin American Test Symposium (1/1/2017-15/3/2017), Program chair

• INGEGNERIA INFORMATICA E DEI SISTEMI, 2025/2026 (41. ciclo)
  Politecnico di TORINO
• INGEGNERIA INFORMATICA E DEI SISTEMI, 2024/2025 (40. ciclo)
  Politecnico di TORINO
• INGEGNERIA INFORMATICA E DEI SISTEMI, 2023/2024 (39. ciclo)
  Politecnico di TORINO

• Collegio di Ingegneria Elettronica, delle Telecomunicazioni e Fisica. Componente
• Collegio di Ingegneria Informatica, del Cinema e Meccatronica. Componente

PhD

• Approximate computing paradigms: from component to application-level. A.A. 2020/21, INGEGNERIA INFORMATICA E DEI SISTEMI. Teaching assistant

Master of Science

• Architetture dei sistemi di elaborazione. A.A. 2026/27, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• HPC (High Performance Computing). A.A. 2026/27, QUANTUM ENGINEERING. Titolare del corso
• HPC (High Performance Computing). A.A. 2025/26, QUANTUM ENGINEERING. Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2025/26, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• HPC (High Performance Computing). A.A. 2024/25, QUANTUM ENGINEERING. Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2024/25, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• HPC (High Performance Computing). A.A. 2023/24, QUANTUM ENGINEERING. Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2023/24, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2022/23, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2021/22, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso
• Architetture dei sistemi di elaborazione. A.A. 2020/21, INGEGNERIA INFORMATICA (COMPUTER ENGINEERING). Titolare del corso

Bachelor of Science

• Computer sciences. A.A. 2022/23, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Collaboratore del corso
• Computer sciences. A.A. 2022/23, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Computer sciences. A.A. 2021/22, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Collaboratore del corso
• Computer sciences. A.A. 2021/22, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso
• Computer sciences. A.A. 2020/21, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Collaboratore del corso
• Computer sciences. A.A. 2020/21, INGEGNERIA DELL'AUTOVEICOLO (AUTOMOTIVE ENGINEERING). Titolare del corso

Projects funded by competitive calls

• RESCHIP4EU - Reinforcing Skills in Chips Design for Europe, (2024-2028) - Componente gruppo di Ricerca
  University cooperation

• CAD - Electronic CAD & Reliability Group (DAUIN)

Projects funded by competitive calls

• REACT - Self-AwaRe NEuromorphic ArChiTectures: Security, Reliability and Energy-Efficiency, (2025-2029) - Responsabile Scientifico
  UE-funded research - HE - Excellent Science - MSCA

Projects funded by commercial contracts

• Supporto allo sviluppo e prototipazione di Interfaccia di Comunicazioni per moduli Laser ALITE, (2026-2028) - Responsabile Scientifico
  Commercial contracts for the provision of services
• Activities for supporting the development of the new Electrical/Electronic Architecture, (2025-2026) - Responsabile Scientifico
  Commercial Research
• New Electrical/Electronic Architecture Pre-study, (2024-2025) - Responsabile Scientifico
  Commercial Research
• Robotics Functional Safety, (2022-2023) - Responsabile contrattuale
  Commercial Research
• Analysis and optimization of Core SelfTest (CST) Libraries running in multi core Automotive Microcontrollers, (2021-2022) - Responsabile Scientifico
  Commercial Research
• Robotics Functional Safety, (2021-2022) - Responsabile Scientifico
  Commercial Research
• Core Self Test (CST) generation able to run in Automotive Microcontrollers multi core devices used for automotive applications, (2020-2020) - Responsabile Scientifico
  Commercial Research
• Core Self Test (CST) generation able to run in Automotive Microcontrollers multi core devices used for automotive applications, (2019-2019) - Responsabile Scientifico
  Commercial Research
• CST generation for a new 40nm Automotive Microcontroller used for automotive applications, (2018-2018) - Responsabile Scientifico
  Commercial Research
• CST generation for a 40nm Automotive Microcontroller, (2017-2017) - Responsabile Scientifico
  Commercial Research

• Lorenzo Fezza. Programme in Ingegneria Informatica E Dei Sistemi (41^st cycle, 2026-in progress)
• Giacomo Perlo. Programme in Ingegneria Informatica E Dei Sistemi (41^st cycle, 2025-in progress)
• Behnam Farnaghinejad. Programme in Intelligenza Artificiale (40^th cycle, 2024-in progress)
  Research subject: Improving the security of embedded systems running AI applications
  
  Embedded AI
  TinyML
• Antonio Porsia. Programme in Ingegneria Informatica E Dei Sistemi (39^th cycle, 2023-in progress)
  
  Computer architectures and Computer aided design
• Juan David Guerrero Balaguera. Programme in Ingegneria Informatica E Dei Sistemi (36^th cycle, 2020-2024)
  Thesis: Reliability Enhancement in GPU Architectures
  
  Cybersecurity
  Life sciences
• Franco Oberti. Programme in Ingegneria Informatica E Dei Sistemi (36^th cycle, 2020-2024)
  Thesis: Cybersecurity for future interconnected and smart vehicles

• Farnaghinejad, Behnam; Ruospo, Annachiara; Savino, Alessandro; Carlo, Stefano Di; ... (2026)
  VeriSide-II: Structure-Aware Power Modeling for Side-Channel Analysis at Register Transfer Level. In: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS), Polignano a Mare (BA), Italy, 1-3 July 2026, pp. 1-5
  Contributo in Atti di Convegno (Proceeding)
• Bosio, Alberto; Sanchez, Ernesto; Sinha, Arani; Pappalardo, Salvatore; Ruospo, ... (2026)
  Trustworthy AI in the Cloud. In: Machine Learning Systems: The Role of Hardware Design for Dependable Computing / S.N., S.L., Springer Nature, pp. 287-322. ISBN: 9783032179470
  Contributo in Volume
• Turco, Vittorio; Ruospo, Annachiara; Sanchez, Ernesto; Sonza Reorda, Matteo (2026)
  Evaluating tensor-related metrics for early fault detection in CNNs. In: APPLIED SOFT COMPUTING, vol. 203, Part A. ISSN 1568-4946
  Contributo su Rivista
• Angione, Francesco; Bernardi, Paolo; Giardino, Nicola Di Gruttola; Filipponi, Gabriele; ... (2026)
  Advances in Testing and Reliability Benchmarks. In: 31st IEEE European Test Symposium, ETS 2026, Chania (GRC), 25-29 May 2026, pp. 1-10. ISBN: 979-8-3195-1763-0
  Contributo in Atti di Convegno (Proceeding)
• Fezza, Lorenzo; Porsia, Antonio; Ruospo, Annachiara; Sanchez, Ernesto; Sonza Reorda, ... (2026)
  Exploiting spatial and temporal consistency for fault detection in semantic segmentation NN for indoor and outdoor exploration. In: MICROPROCESSORS AND MICROSYSTEMS, vol. 124. ISSN 0141-9331
  Contributo su Rivista

• A Shannon-Hartley-Based Approach To Measure The Criticality Of Synaptic Weights. international Patent
  Inventors: Annachiara Ruospo Edgar Ernesto Sanchez Sanchez