Alessandro Varaldi

Ph.D. candidate in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 39th cycle (2023-2026)
Department of Electronics and Telecommunications (DET)



Research topic

Logic-In-Memory DataFlow Architectures for high performance low power applications


Research interests

VLSI theory, design and applications


Alessandro Varaldi received his bachelor's degree in Electrical Engineering in 2020 and his master's degree in Mechatronic Engineering in 2023, both from Politecnico di Torino. For his master's thesis, he designed the architecture of a hardware accelerator for machine learning algorithms, specifically in the field of image processing.

He is now attending the Ph.D. program in Electrical, Electronic and Communications Engineering at Politecnico di Torino, in collaboration with Ideas & Motion. His research activity is focused on the study of DataFlow architectures based on the Logic-In-Memory principle for high-performance, low-power applications; the goal is the development of a methodology for the implementation of hardware accelerators in Automotive applications, particularly suitable for the acceleration of machine learning algorithms.