Ph.D. candidate in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 39th cycle (2023-2026)
Department of Electronics and Telecommunications (DET)
Adjunct lecturer/Adjunct instructor
Department of Electronics and Telecommunications (DET)
Profile
PhD
Research topic
EDA, Embedded Machine Learning
Tutors
Keywords
Teaching
Teachings
Master of Science
- Microelettronica digitale. A.A. 2025/26, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
- Microelettronica digitale. A.A. 2024/25, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
- Microelettronica digitale. A.A. 2023/24, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
Research
Research Areas/Fields/Groups
Publications
Latest publications View all publications in Porto@Iris
- Lagostina, L.; Cortadella, J.; Casu, M. R.; Lavagno, L. (2026)
Design for testability using mixed-polarity flip-flops and latches. In: 2026 Design, Automation & Test in Europe Conference (DATE), Verona, pp. 1-6. ISSN 1530-1591
Contributo in Atti di Convegno (Proceeding) - Lagostina, L.; Volpe, D.; Zamboni, M.; Turvani, G. (2025)
AEQUAM: Accelerating Quantum Algorithm Validation through FPGA-Based Emulation. In: IEEE ACCESS, vol. 13, pp. 130232-130255. ISSN 2169-3536
Contributo su Rivista - Lagostina, Lorenzo; Minnella, Filippo; Cortadella, Jordi; Casu, Mario R.; Lazarescu, ... (2024)
Mix & Latch: Comparison With State-of-the-Art Retiming On a RISC-V Benchmark. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 43, pp. 2229-2233. ISSN 0278-0070
Contributo su Rivista