Anagrafe della ricerca

SMART-IC - Smart Monitoring and Production Optimization for Zero-waste Semiconductor Manufacturing: SMART-IC

Durata:
24 mesi (2023 - 2025)
Responsabile scientifico:
Tipo di progetto:
Ricerca Nazionale - PRIN
Ente finanziatore:
MINISTERO (MUR)
Codice identificativo progetto:
2022T7YSHJ
Ruolo PoliTo:
Coordinatore

Abstract

In recent years, data became the main driver of innovation in manufacturing, particularly with the advent of Machine Learning-based technologies for process optimization. This revolution, called Industry 4.0 (I4.0), introduced decentralized, self-organizing and self-learning systems for production control, with new machine learning algorithms getting increasingly powerful to solve real world problems, like predictive maintenance and anomaly detection. On the other hand, many data-driven applications are still far from being optimized to cover many aspects and the complexity of modern industries. Data-driven dynamic scheduling and allocation in complex manufacturing scenarios have been only partially developed by the literature. Moreover, correlations between smart monitoring, production scheduling and anomaly detection/predictive maintenance have been only partially exploited, while they could be beneficial to improve effectiveness and reduce production machinery wear. The integration of all such aspects into a coherent analysis and optimization production flow is a challenging task. The SMART-IC main objective is to develop new data-driven approaches for smart monitoring and production optimization. The focus of the project is semiconductor manufacturing, one of the most technologically advanced and data-intensive industrial sectors, where process quality, control and simulation tools are critical for decreasing costs and increasing yield. Additionally, the increased semiconductor demand and the simultaneous global chip shortage make waste reduction and effectiveness improvement extremely critical. In SMART-IC we aim at reducing defect generation at the electronic component level and, therefore, its propagation to the system level and then to the system-of-system (SoS) level. SMART-IC main ambition is to inspect, detect and reduce all relevant wafer level defects, and among those, to identify and contain the ‘latent’ defects on mask and wafers during components manufacturing. With advanced inspections, consisting of massive inspection systems, interconnected sensors and component functional safety real time monitoring module, vast amount of generated data will allow to model, monitor and feedback earlier Ministero dell'Università e della Ricerca MUR - BANDO 2022 phases of the IC manufacturing, to minimize the number of defects at each process steps and by that to reduce waste products at all levels, which will require to be recalled from the field, recycled or re-used. It is important to note that this goal falls in the indications of the Chips Act and of the Industrial Strategy, promulgated in February 2022 by the European Commission: both documents underline the need for “devices [...] designed for energy efficiency and durability, repairability, upgradability, maintenance, reuse and recycling”.

Persone coinvolte

Dipartimenti coinvolti

Parole chiave

Settori ERC

PE6_2 - Computer systems, parallel/distributed systems, sensor networks, embedded systems, cyber-physical systems
PE6_11 - Machine learning, statistical data processing and applications using signal processing (e.g. speech, image, video)
PE6_7 - Artificial intelligence, intelligent systems, multi agent systems

Budget

Costo totale progetto: € 285.899,00
Contributo totale progetto: € 277.999,00
Costo totale PoliTo: € 99.649,00
Contributo PoliTo: € 79.964,00