Mattia Mirigaldi

Tutori

• Guido Masera
• Fabrizio Fraternali

Corso di laurea magistrale

• Digital Electronics. A.A. 2025/26, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso
• Digital Electronics. A.A. 2024/25, INGEGNERIA ELETTRONICA (ELECTRONIC ENGINEERING). Collaboratore del corso

• Architetture hardware digitali per EDGE computing (DET)

• Giuffrida, Luigi; Dolmeta, Alessandra; Naclerio, Alessio; Piscopo, Valeria; Mirigaldi, ... (2026)
  PolHEEPo: A 65 nm 6mm2 RISC-V SoC Filling the Gap Between Cloud and Edge Computing. In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS, pp. 1-1. ISSN 1549-7747
  Contributo su Rivista
• Mirigaldi, Mattia; Paninforni, Nico; Martina, Maurizio; Masera, Guido (2026)
  Compact Yet Fast: An Efficient d-Order Masked Implementation of Ascon. In: 2026 Design, Automation & Test in Europe Conference (DATE), Verona (Ita), 20 - 22 Aprile 2026. ISBN: 978-3-9826741-1-7
  Contributo in Atti di Convegno (Proceeding)
• Dolmeta, Alessandra; Piscopo, Valeria; Mirigaldi, Mattia; Martina, Maurizio; Masera, ... (2025)
  RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards. In: 2025 IEEE International Symposium on Circuits and Systems, Londra (UK), May 25-28, 2025, pp. 1-5. ISBN: 979-8-3503-5683-0
  Contributo in Atti di Convegno (Proceeding)
• Piscopo, Valeria; Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, ... (2025)
  A Deep Dive into Integration Methodologies in RISC-V. In: 22nd ACM International Conference on Computing Frontiers, Cagliari (Ita), May 28-30, 2025, pp. 30-33. ISBN: 979-8-4007-1393-4
  Contributo in Atti di Convegno (Proceeding)
• Mirigaldi, Mattia; Piscopo, Valeria; Martina, Maurizio; Masera, Guido (2025)
  The Quest for Efficient ASCON Implementations: A Comprehensive Review of Implementation Strategies and Challenges. In: CHIPS, vol. 4, pp. 1-29. ISSN 2674-0729
  Contributo su Rivista