Ph.D. candidate in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 39th cycle (2023-2026)
Department of Electronics and Telecommunications (DET)
Adjunct lecturer/Adjunct instructor
Department of Electronics and Telecommunications (DET)
Profile
PhD
Research topic
Neural networks HW/SW acceleration targeting CPU, ASIC and FPGA devices
Tutors
Keywords
Teaching
Teachings
Master of Science
- Edge Computing Systems for AI and ML. A.A. 2025/26, MECHATRONIC ENGINEERING (INGEGNERIA MECCATRONICA). Collaboratore del corso
- Edge Computing Systems for AI and ML. A.A. 2024/25, MECHATRONIC ENGINEERING (INGEGNERIA MECCATRONICA). Collaboratore del corso
Bachelor of Science
- Progettazione elettronica digitale. A.A. 2025/26, INGEGNERIA INFORMATICA. Collaboratore del corso
- Progettazione elettronica digitale. A.A. 2024/25, INGEGNERIA INFORMATICA. Collaboratore del corso
Publications
Latest publications View all publications in Porto@Iris
- Manca, Edward; Urbinati, Luca; Casu, Mario R. (2025)
Accelerating Mixed-Precision QNN Inference on RISC-V MCUs With the STAR-MAC Unit. In: IEEE ACCESS, vol. 13, pp. 208533-208548. ISSN 2169-3536
Contributo su Rivista - Manca, Edward; Urbinati, Luca; Casu, Mario R. (2024)
STAR: Sum-Together/Apart Reconfigurable Multipliers for Precision-Scalable ML Workloads. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), Valencia (Spain), 25-27 March 2024, pp. 1-6. ISBN: 978-3-9819263-8-5
Contributo in Atti di Convegno (Proceeding) - Manca, Edward; Urbinati, Luca; Casu, Mario R. (2024)
Accelerating Quantized DNN Layers on RISC-V with a STAR MAC Unit. In: 54th Annual Meeting of the Italian Electronics Society, Noto (SR), Italia, September 6-8, 2023, pp. 43-53. ISSN 1876-1100. ISBN: 978-3-031-48710-1
Contributo in Atti di Convegno (Proceeding)