PhD Student in Ingegneria Elettrica, Elettronica E Delle Comunicazioni , 35th cycle (2019-2022)
Department of Electronics and Telecommunications (DET)
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Department of Electronics and Telecommunications (DET)
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PhD
Thesis title
Improving Quality of Results for High-Level Synthesis based FPGA designs
Research topic
Design of prefetching cache unit for FPGA-based accelerators
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Publications
Latest publications View all publications in Porto@Iris
- Jamal, MUHAMMAD USMAN; Li, Zhuowei; Lazarescu, MIHAI T.; Lavagno, Luciano (In stampa)
A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis. In: IEEE ACCESS. ISSN 2169-3536
Contributo su Rivista - Brignone, Giovanni; Jamal, Muhammad Usman; Lazarescu, Mihai T.; Lavagno, Luciano (2022)
Array-specific dataflow caches for high-level synthesis of memory-intensive algorithms on FPGAs. In: IEEE ACCESS, vol. 10, pp. 118858-118877. ISSN 2169-3536
Contributo su Rivista - Marcelli, Andrea; Sanchez, Ernesto; Squillero, Giovanni; Jamal, Muhammad Usman; Imtiaz, ... (2018)
Defeating hardware Trojan in microprocessor cores through software obfuscation. In: IEEE 19th Latin-American Test Symposium (LATS), 2018, pp. 1-6. ISBN: 978-1-5386-1472-3
Contributo in Atti di Convegno (Proceeding)